61.
When setting the voltage for an external device that must interface with an FPGA, you must change the value of
A
VDDiO
B
VCCIN
C
VCCIO
D
VDDIN
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74 practice sets · Page 4 of 4
When setting the voltage for an external device that must interface with an FPGA, you must change the value of
VDDiO
VCCIN
VCCIO
VDDIN
Which of the following is a special type of transistor used in the TTL series to improve speed characteristics?
Brattain
Schottky
Belrus
Shockley
Which of the following is a concern when using CMOS type devices?
fan out
under voltage
mechanical shock
electrostatic discharge
Which of the following input levels would not be a valid HIGH for a TTL gate?
1.8 V
All are valid.
2.4 V
2.1 V
Which of the following are not characteristics of TTL logic gates?
CMOS transistors
Multiemitter transistors
Totem-pole output
Bipolar transistors
Which alteration is made in the manufacture of a TTL gate to create an open-collector output?
The output transistors are missing.
The top output transistor is missing.
The output transistors are replaced by diodes.
The input transistor is replaced by a diode.
When the outputs of several standard TTL gates are connected together, the gate outputs
usually burn out.
produce more voltage.
enable new logic configurations.
produce more fan-out.
When the outputs of several open-collector TTL gates are connected together, the gate outputs
are ANDed together.
produce more voltage.
produce more fan-out.
usually burn out.
When interfacing CMOS to TTL what potential problem must be overcome?
The output current may be too great.
The high voltage may be too low.
There may be insufficient current.
The low output voltage may be insufficient.
When a TTL gate output connects to a CMOS gate, what must be added to the circuit?
a pull-down resistor
an open-collector gate
a decoupling capacitor
a pull-up resistor
When a CMOS gate output connects to a TTL gate, which circuit is needed?
a pull-down resistor
a CMOS buffer
a decoupling capacitor
a pull-up resistor
What advantage does the 74SXX series device have over standard TTL?
low power consumption
reduced propagation delay
higher propagation delay
lower voltage requirements
What advantage does the 74LXX series device have over standard TTL?
higher propagation delay
low power consumption
lower voltage requirements
reduced propagation delay
What advantage does the 74LSXX series device have over standard TTL?
low power consumption
low power consumption and reduced propagation delay
higher propagation delay
reduced propagation delay