41.
The abbreviated designation for input current with a LOW input is
A
IOL.
B
VIH.
C
IIH.
D
IIL.
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The abbreviated designation for input current with a LOW input is
IOL.
VIH.
IIH.
IIL.
The abbreviated designation for input current with a HIGH input is
IOL.
VIH.
IIH.
IIL.
The 54XX TTL IC series is the military version and has
all of the above.
a wider temperature range.
more stringent power supply requirements.
higher current output capability.
One advantage that MOSFET transistors have over bipolar transistors is
low input impedance.
reduced propagation delay.
higher switching speed.
high input impedance.
In order to interface an FPGA with an external device, you must set the value of the
sink current.
external power supply.
source current.
all of the above
Fan-out for a typical TTL gate is
10
4
54
100
Each input on a TTL gate is connected to the transistors
base.
collector.
gate.
emitter.
An open-collector TTL gate
can sink current but cannot source current.
can source current but cannot sink current.
cannot source or sink current.
can sink more current than a standard TTL gate.
An open-collector TTL gate
must have an external pull-up resistor to produce a LOW.
must have an external pull-up resistor to produce a HIGH.
must have an external ground connected to the output to produce a LOW.
must have a transistor added to the output to produce a HIGH.
An invalid input voltage for a TTL logic gate would be
less than 0.8 V.
greater than 2.0 V but less than 5.0 V.
greater than 2.0 V.
between 0.8 V and 2.0 V.
A family of logic devices designed for extremely high speed applications is called
NMOS
ECL
PMOS
TTL
A common means for comparing the propagation delays and the power dissipation of various logic gates is the
fan-out.
power requirements.
speed-power product.
noise margin.
Which specialized device distinguishes the 74LSXX circuits from standard 74XX circuits?
a Schottky diode
a CMOS transistor
a multiemitter transistor
totem-pole output transistor
Which potential problem must be overcome when interfacing TTL to CMOS?
The HIGH output voltage may be too low.
The LOW output voltage may be too high.
The HIGH output voltage may be too high.
The output current may not be sufficient.
Which of the following output levels would not be a valid LOW for a TTL gate?
0.3 V
0.5 V
0.2 V
All are valid.
Which of the following output levels would be a valid HIGH for a TTL gate?
3.0 V
2.6 V
5.1 V
All are valid.
Which of the following levels would not be a valid LOW for a TTL gate?
0.1 V
0.7 V
1.0 V
All are valid.
Which of the following is not a solution to interface problems between CMOS and TTL?
pull-up resistor
pull-down resistor
level-shifter
buffer
Which of the following is not a common logic family used today?
RTL
ECL
TTL
CMOS
Which of the following digital IC logic families is most susceptible to static discharge?
MOS
TTL
RTL
ECL