521.
The iconic feature of the RISC machine among the following are
A
Reduced number of addressing modes
B
Increased memory size
C
Having a branch delay slot
D
All of the above
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The iconic feature of the RISC machine among the following are
Reduced number of addressing modes
Increased memory size
Having a branch delay slot
All of the above
The expression delayed load is used in context of
processor-printer communication
memory-monitor communication
pipelining
none of the above
The cost of a parallel processing is primarily determined by :
Time Complexity
Switching Complexity
Circuit Complexity
None of the above
The concept of pipelining is most effective in improving performance if the tasks being performed in different stages :
require different amount of time
require about the same amount of time
require different amount of time with time difference between any two tasks being same
require different amount with time difference between any two tasks being different
The clock rate of the processor can be improved by,
Improving the IC technology of the logic circuits
Reducing the amount of processing done in one step
By using overclocking method
All of the above
The average number of steps taken to execute the set of instructions can be made to be less than one by following
ISA
Pipe-lining
Super-scaling
Sequential
The advantage of RISC processor over CISC processor is that
The hardware architecture is simpler
An instruction can be executed in one cycle
Less number of registers accommodate in chip
Parallel execution capabilities
The access time of memory is ............... the time required for performing any single CPU operation.
Longer than
Shorter than
Negligible than
Same as
The 16- bit registers in 8085 is
general purpose register
accumulator
stack pointer and program counter
all of the above
Te devices connected to a microprocessor can use the data bus:
all the time
at regular interval of time
only when it's sending or receiving data
when the microprocessor is reset
Systems that do not have parallel processing capabilities are
SISD
SIMD
MIMD
All of the above
SPEC stands for,
Standard Performance Evaluation Code.
System Processing Enhancing Code.
System Performance Evaluation Corporation.
Standard Processing Enhancement Corporation.
Processors of all computers, whether micro, mini or mainframe must have
ALU
Primary Storage
Control unit
All of above
Pipelining strategy is called implement
instruction execution
instruction prefetch
instruction decoding
instruction manipulation
Pipe-lining is a unique feature of
RISC
CISC
ISA
IANA
Pipeline implement
fetch instruction
decode instruction
fetch operand
calculate operand
PC Program Counter is also called
instruction pointer
memory pointer
data counter
file pointer
Parallel programs: Which speedup could be achieved according to Amdahls law for infinite number of processors if 5% of a program is sequential and the remaining part is ideally parallel?
Infinite speedup
5
20
50
Parallel processing may occur
in the instruction stream
in the data stream
both[A] and [B]
none of the above
Micro instructions are stored in
computer memory
primary storage
secondary storage
control memory