Memory Devices in Digital Circuits : Practice MCQ Questions & Answers with Explanations

Dynamic RAM is used as main memory in a computer system as it has a higher speed due to the presence of MOSFET technology. However, it’s access time is more compared to SRAM and operation is slow.

Most modern operating systems employ a method of extending RAM capacity, known as virtual memory which consists of SRAM.

The main memory of a PC is made of cache and DRAM. DRAM offers reduced power consumption and large storage capacity in a single memory chip.

The dynamic RAM offers reduced power consumption and large storage capacity in a single memory chip. With the availability of such high packing density memory ICs, the capacity of memory will continue to grow. However, it’s access time is more and thus operation is slow.

The disadvantage of MOS capacitor in DRAM is that it can’t hold the stored charge over a long period of time and it has to be refreshed every few millisecond. Thus, DRAM is slow in operation.

DRAM uses of integrated MOS capacitors as memory cell instead of a flip-flop. The advantage of this cell is that it allows very large memory arrays to be constructed on a chip at a lower cost per bit than in static memories.

Most modern operating systems employ a method of extending RAM capacity, known as virtual memory. Virtual memory is seen as part of main memory but is actually a secondary memory.

Capacitor has high storing capability only, so DRAM stores its binary information in the form of electric charges on capacitors. However, DRAM takes more time time to access data.

The Dynamic Random Access Memory is the lowest cost, highest density random access memory available. Nowadays, computers use DRAM for main memory. However, it’s access time is more compared to SRAM. The memory size of DRAM lies between 16 to 256 MB.

The Dynamic Random Access Memory is the lowest cost, highest density random access memory available. Nowadays, computers use DRAM for main memory. However, it’s access time is more compared to SRAM.

IC 74154 is used for the implementation of 1-to-16 DEMUX, whose output is inverted input.

The number of AND gates required will be equal to the number of outputs in a demultiplexer, which are 8.

The formula for total no. of outputs is given by 2n, where n is the no. of select lines. In this case n = 3 since 23 = 8.

No explanation is available for this question yet.

A demultiplexer sends a single input to multiple outputs, depending on the select lines. As the select input changes, the output of the multiplexer varies according to that input.

The formula for total no. of outputs is given by 2n, where n is the no. of select lines. Therefore, for 1:4 demultiplexer, 2 select lines are required.

A demultiplexer sends a single input to multiple outputs, depending on the select lines. Demultiplexer converts single input into multiple outputs.

A demultiplexer sends a single input to multiple outputs, depending on the select lines. For one input, the demultiplexer gives several outputs. That is why it is called a data distributor.

The decimal numbers are converted to their respective binary equivalent and then the binary addition rules are applied.

Only 2’s complement is used for arithmetic operations, as it is more fast.